Design of a half-rate phase detector using MOS current-mode logic gates for 10-Gbit/s clock and data recoveryMOS current-mode logic (MCML) gate를 이용한 10-Gbit/s CDR용 half-rate 위상검출기의 설계에 관한 연구
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | Lee, Man-Seop | - |
| dc.contributor.advisor | 이만섭 | - |
| dc.contributor.author | Shin, Jong-Kil | - |
| dc.contributor.author | 신종길 | - |
| dc.date.accessioned | 2011-12-30 | - |
| dc.date.available | 2011-12-30 | - |
| dc.date.issued | 2005 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=392566&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/55409 | - |
| dc.description | 학위논문(석사) - 한국정보통신대학교 : 공학부, 2005, [ viii, 59 p. ] | - |
| dc.language | eng | - |
| dc.publisher | 한국정보통신대학교 | - |
| dc.subject | MOS | - |
| dc.subject | Phase Detector | - |
| dc.subject | Half-Rate | - |
| dc.subject | Design | - |
| dc.subject | Current-Mode Logic | - |
| dc.subject | 위상검출기 | - |
| dc.subject | 설계 | - |
| dc.subject | Clock and Data Recovery | - |
| dc.subject | 10-Gbit/s | - |
| dc.subject | Gate | - |
| dc.title | Design of a half-rate phase detector using MOS current-mode logic gates for 10-Gbit/s clock and data recovery | - |
| dc.title.alternative | MOS current-mode logic (MCML) gate를 이용한 10-Gbit/s CDR용 half-rate 위상검출기의 설계에 관한 연구 | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 392566/225023 | - |
| dc.description.department | 한국정보통신대학교 : 공학부, | - |
| dc.identifier.uid | 020034546 | - |
| dc.contributor.localauthor | Lee, Man-Seop | - |
| dc.contributor.localauthor | 이만섭 | - |
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