DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kim, Dae-Young | - |
dc.contributor.advisor | 김대영 | - |
dc.contributor.author | Cho, Hye-Young | - |
dc.contributor.author | 조혜영 | - |
dc.date.accessioned | 2011-12-30 | - |
dc.date.available | 2011-12-30 | - |
dc.date.issued | 2004 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=392371&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/55287 | - |
dc.description | 학위논문(석사) - 한국정보통신대학교 : 공학부, 2004, [ x, 74 p. ] | - |
dc.description.abstract | As Internet application grows explosively, the attacks of hackers on network are increasing rapidly, and becoming more seriously. Thus information security is emerging as an important factor in designing network systems, and network intrusion detection systems (NIDS) are becoming a key issue. However, the performance of current intrusion detection system can not handle the increasing internet traffic. The reason is that most of the intrusion detection engines(IDEs), core components that perform detection of network intrusion, are implemented by software. Generally there are two approaches for enhancing the performance of NIDS; software-based IDEs and hardware-based IDEs. Software-based IDEs, such as Snort, are implemented by software using general processores. To improve the performance of software-based IDEs, many researches have focused on enhancing pattern matching algorithms. On the other hand, hardware-based IDEs use special hard-wired processors for high speed packet processing or new techniques utilizing hardware for efficient pattern matching. However, both approaches have limitation from the viewpoint of performance and flexibility. In this thesis, to achieve fast packet processing and dynamic adaptation of intrusion patterns that are continuously updated, we propose a network processor based high performance network intrusion detection system (NP-NIDS). In our implementation, Intel``s network processors, IXP1200 and IXP2400, are used due to their higher programmability. To develop a high performance intrusion detection engine with a network processor, which has limited resources, we design an optimized architecture and algorithms. In addition, for more efficient detection engine scheduling, we proposed task allocation methods on multi-processing processors. We implement a prototype of network processor based network intrusion detection systems, and its performance is evaluated by simulations. A RISC based network processor is specialized for fas... | eng |
dc.language | eng | - |
dc.publisher | 한국정보통신대학교 | - |
dc.subject | Network intrusion detection engine | - |
dc.subject | Network processor | - |
dc.title | A high performance network intrusion detection engine based on network processor | - |
dc.title.alternative | 네트워크 프로세서 기반 고성능 침입 탐지 엔진에 관한 연구 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 392371/225023 | - |
dc.description.department | 한국정보통신대학교 : 공학부, | - |
dc.identifier.uid | 020024105 | - |
dc.contributor.localauthor | Kim, Dae-Young | - |
dc.contributor.localauthor | 김대영 | - |
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