Design of a fully-integrated 5GHz differentially-tuned CMOS LC VCO for half-rate 10Gb/s clock and data recovery

Abstract

In this thesis, a fully-integrated 5GHz differentially-tuned CMOS LC voltage controlled oscillator (VCO) for a half-rate 10Gb/s clock and data recovery (CDR), is designed and analyzed. The designed VCO has the feature of simple LC tank which gives high VCO performance. By using differentially-tunable voltage control topology, high frequency tuning range and ideal tuning linearity could be obtained. The proposed 5GHz VCO had wide tuning range, super tuning linearity and low phase noise performances for half-rate 10Gb/s CDR applications and the TSMC 0.18$\mum$ CMOS technology was used for integrated circuits (IC) design. In order to verify its operation after IC fabrication, the designed IC was simulated under the various realistic environments: temperature and process variations. The VCO has the principal designed specifications of -135dBc/Hz @ 1MHz offset frequency and 4.25GHz~5.7GHz frequency tuning range (28%) in the simulation using the Cadence as a design tool.