Design of an 155Mbps burst mode pre- and limiting-amplifiers using CMOS technology for ATM-PON systemsCMOS 회로를 이용한 155Mbps 급 ATM-PON 시스템용 버스트 모드 광수신기 제작에 관한 연구
We designed and fabricated a burst mode receiver (BMR) for optical-line-terminal in an asynchronous transfer mode passive optical network (ATM-PON) system. The configuration of this BMR consists of a photodiode, preamplifier, and limiting amplifier (LA) with peak detector. This BMR was designed with the specification based on the ITU-T G.983.1 Recommendation.
The bandwidth of a preamplifier and a LA was designed to 200MHz and 350MHz, respectively. And also these have $90dB\Omega$ and 36dB gains, respectively. For the class-C optical path, the BMR must have a high sensitivity with minimum sensitivity of -33dBm. So we could obtain the input noise current density of 1.07pA/sqrt(Hz) by designing a low noise preamplifier. The burst mode integrated circuit was designed using $0.35\mum$ CMOS technology. But the designed preamplifier is not work. So, we used the commercial preamplifier to verify the performance of the limiting amplifier. The commercial TIA has 3-dB bandwidth of 210MHz, sensitivity of -33dBm, and transimpedance gain of $87dB\Omega$.
To verify the performance of the fabricated BMR, we used the HP E4859A serial cell generator and analyzer system. This measurement is done with two packets. One is the packet with the largest available amplitude. The other is the packet with the smallest available amplitude. The result of packet transmission test is satisfied with the bit error rate of $10^(-10)$ mentioned in the ITU-T G.983.1 Recommendation in range from -28dBm to -7dBm. So, dynamic range is about 21dB.