Fluorine ion implantation into a channel layer has been introduced, as an alternative method to improve the characteristics of low temperature poly-Si thin film transistors from LPCVD a-Si, and the capacitance-voltage characteristics of poly-Si TFT through the direct measurement with TFT structure have been also presented. Poly-Si films used as a channel layer were prepared by the solid phase crystallization (SPC) of LPCVD a-Si at $600\,^\circ\!C$ in $N_2$ atmosphere. In order to find out the optimum deposition condition of a-Si film, the deposition temperature was varied from 520 to $580\,^\circ\!C$ at a fixed pressure of 500 mtorr, using the mixture of $SiH_4$ and $H_2$ as a source gas. Amorphous Si films were completely crystallized after 2 h annealing. As the deposition temperature increased, the grain size of recrystallized poly-Si films increased first and reached the maximum value of about $3000\mbox{\AA}$ at $540\,^\circ\!C$ and then decreased gradually. Using these films, n- and p-ch poly-Si TFTs were fabricated on thermally oxidized Si substrates. The device performance was mainly dependent on the grain size of recrystallized poly-Si films. The device in a-Si films deposited at $540\,^\circ\!C$ exhibits the highest performance. After hydrogenation by PECVD silicon nitride layer, the characteristics of n- and p-ch TFT were much more improved. Especially, the maximum field effect mobility increased from about 32 to $48 cm^2/V \cdot \sec$ for n-ch and from about 30 to $35 cm^2/V \cdot \sec$ for p-ch TFT. To investigate the effects of $F^+$ implantation into a-Si films on the poly-Si TFT characteristics, first the recrystallization behavior of the $F^+$-implanted a-Si films was examined by XRD, TEM, and Raman spectroscopy. The grain size of Si films increased from about 0.3 to about $2.3 \mu{m}$ with increasing $F^+$ dose. The grain size enhancement was more effective, when the projection range of fluorine ion was placed near the Si/$SiO_2$ interface. Thi...