New monte carlo based time-domain noise analysis and its application to a design of low-noise CMOS readout circuits = 새로운 몬테카를로 방법을 이용한 시간영역 잡음 해석과 이를 이용한 저잡음 CMOS Readout 회로 설계에 관한 연구

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Noise performance of electronic circuits principally such as time-invariant circuits is usually handled in the frequency-domain rather than in the time-domain due to the simple noise expressions and calculations in the frequency-domain. However, according to the increase in the complexity of the circuit architecture and in the demand on the transient analysis of time-variant circuits, several studies on the time-domain noise analysis have been attempted in spite of the difficulty in the modeling and simulation of the noise signals in the time-domain. In this study the Monte Carlo based time-domain Hspice noise simulation with random amplitude piecewise waveform and its application to a design of low-noise CMOS readout circuits were evaluated. The amplitude distribution of thermal noise was modeled with Gaussian random number. In case of 1/f noise, since its amplitude distribution is a non-Gaussian one, its waveform was modeled with several serial-connected low-pass filters of thermal noise generators with cascaded poles. These time-domain noise sources were connected in parallel with the drain and source nodes of the CMOS input transistor of the preamplifier. The Hspice transient noise simulation of a CSA-CRRC circuit with these noise sources yielded ENC values at the output node of the shaper for thermal and 1/f noise of 47 e- and 732 e-, respectively. ENC values calculated from the integral of the transfer function in the frequency-domain are 44 e- and 882 e-, respectively. The results of the Hspice transient noise simulation were similar to those of the frequency-domain calculation. To validate this time-domain noise simulation, a test chip was designed and fabricated in the AMI 0.5 μm CMOS technology. The measured ENC value was 904 e-. These results show that the Monte Carlo based time-domain noise simulation is valid. The technique obtained from this time-domain noise simulation was applied to a design of a multi-channel readout circuit for CdZnTe detector...
Advisors
Cho, Gyu-Seongresearcher조규성researcher
Description
한국과학기술원 : 원자력및양자공학과,
Publisher
한국과학기술원
Issue Date
2003
Identifier
181068/325007 / 000985301
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 원자력및양자공학과, 2003.2, [ xi, 113 p. ]

Keywords

Monte Carlo; Low-noise readout circuits; Time-domain noise analysis; Hspice noise simulation; Hspice 잡음 해석; 몬테카를로 방법; 저잡음 회로 설계; 시간영역 잡음 해석

URI
http://hdl.handle.net/10203/48949
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=181068&flag=dissertation
Appears in Collection
NE-Theses_Ph.D.(박사논문)
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