다결정 실리콘 박막 트랜지스터에서의 바이어스에 의한 결함 생성에 관한 연구Bias stress induced defects in polycrystalline silicon thin film transistor
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 신성철 | - |
| dc.contributor.advisor | 이주천 | - |
| dc.contributor.advisor | Shin, Sung-Chul | - |
| dc.contributor.advisor | Lee, Choo-Choon | - |
| dc.contributor.author | 김서윤 | - |
| dc.contributor.author | Kim, Seo-Yoon | - |
| dc.date.accessioned | 2011-12-14T07:26:57Z | - |
| dc.date.available | 2011-12-14T07:26:57Z | - |
| dc.date.issued | 1996 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=108882&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/47538 | - |
| dc.description | 학위논문(박사) - 한국과학기술원 : 물리학과, 1996.8, [ vii, 92 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.subject | 다결정 실리콘 | - |
| dc.subject | 박막 트랜지스터 | - |
| dc.subject | Activation energy | - |
| dc.subject | Grain boundary | - |
| dc.subject | Simulation | - |
| dc.subject | Thin film transistor | - |
| dc.subject | Poly-Si | - |
| dc.subject | 활성화 에너지 | - |
| dc.subject | 모델링 | - |
| dc.title | 다결정 실리콘 박막 트랜지스터에서의 바이어스에 의한 결함 생성에 관한 연구 | - |
| dc.title.alternative | Bias stress induced defects in polycrystalline silicon thin film transistor | - |
| dc.type | Thesis(Ph.D) | - |
| dc.identifier.CNRN | 108882/325007 | - |
| dc.description.department | 한국과학기술원 : 물리학과, | - |
| dc.identifier.uid | 000895065 | - |
| dc.contributor.localauthor | 김서윤 | - |
| dc.contributor.localauthor | Kim, Seo-Yoon | - |
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- PH-Theses_Ph.D.(박사논문)
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