Memory operation of InAs quantum dot heterostructure field effect transistor

Abstract

The memory operation of a self-assembled InAs quantum dot heterostructure field effect transistor (FET) is presented. The amount of trapped electrons in the quantum dots determines the gate-source capacitance and the drain current at a gate bias. In capacitance-voltage (C-V) measurement at low frequency, the quantum dots respond to the signal and a difference of capacitance was observed. These results imply that the memory operation is due to the charge trapping effect of InAs quantum dots.