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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing Shin, Wongyu; Choi, Jungwhan; Jang, Jaemin; Suh, Jinwoong; Moon, Youngsuk; Kwon, Yongkee; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.10, pp.3027 - 3040, 2016-10 | |
| Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime Lee, Seunghan; Kang, Kyungsu; Jung, Jongpil; Kyung, Chong-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.10, pp.3118 - 3131, 2016-10 | |
| Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems Lee, Youngjoo; Jung, Jaehwan; Park, In-Cheol, IEICE TRANSACTIONS ON ELECTRONICS, v.E99C, no.2, pp.293 - 301, 2016-02 |
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