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A three-dimensional stacked-chip star-wiring interconnection for a digital noise-free and low-jitter I/O clock distribution network Ryu, C; Chung, D; Lee, C; Kim, Joungho; Bae, K; Yu, J; Lee, S, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.16, pp.651 - 653, 2006-12 |
Suppression of power/ground inductive impedance and simultaneous switching noise using silicon through-via in a 3-D stacked chip package Ryu, C; Park, J; Pak, JS; Lee, K; Oh, T; Kim, Joungho, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.17, pp.855 - 857, 2007-12 |
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