Showing results 1 to 5 of 5
A 1.8 V 900 mu W 4.5 GHz VCO and Prescaler in 0.18 mu m CMOS Using Charge-Recycling Technique Park, Dong-Min; Cho, Seong-Hwan, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.19, pp.104 - 106, 2009-02 |
A 14.2 mW 2.55-to-3 GHz Cascaded PLL With Reference Injection and 800 MHz Delta-Sigma Modulator in 0.13 mu m CMOS Park, Dong-Min; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.12, pp.2989 - 2998, 2012-12 |
A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR Delta Sigma Modulator and Nested PLL Park, Pyoung-Won; Park, Dong-Min; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.10, pp.2433 - 2443, 2012-10 |
A Low-Noise and Low-Power Frequency Synthesizer Using Offset Phase-Locked Loop in 0.13-mu m CMOS Park, Pyoung-Won; Park, Dong-Min; Cho, Seong-Hwan, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.20, pp.52 - 54, 2010-01 |
Design Techniques for a Low-Voltage VCO With Wide Tuning Range and Low Sensitivity to Environmental Variations Park, Dong-Min; Cho, Seong-Hwan, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.57, pp.767 - 774, 2009-04 |
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