Browse "EE-Journal Papers(저널논문)" by Author Kim, Young Ju

Showing results 1 to 5 of 5

1
A 10-Gb/s 0.71-pJ/bit Forwarded-Clock Receiver Tolerant to High-Frequency Jitter in 65-nm CMOS

Chung, Sang-Hye; Kim, Young Ju; Kim, Yonghun; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.3, pp.264 - 268, 2016-03

2
A Forwarded Clock Receiver Based on Injection-Locked Oscillator With AC-Coupled Clock Multiplication Unit in 0.13 mu m CMOS

Kim, Young Ju; Chung, Sang-Hye; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.23, no.5, pp.988 - 992, 2015-05

3
A Forwarded-Clock Receiver With Constant and Wide-Range Jitter-Tracking Bandwidth

Chung, Sang-Hye; Kim, Young Ju; Ha, Kyung-Soo; Bae, Seung-Jun; Lee, Jung-Bae; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.3, pp.153 - 157, 2014-03

4
A Quarter-Rate Forwarded Clock Receiver Based on ILO With Low Jitter Tracking Bandwidth Variation Using Phase Shifting Phenomenon in 65 nm CMOS

Kim, Young Ju; Chung, Sang-Hye; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.8, pp.2482 - 2490, 2014-08

5
An 11.5 Gb/s 1/4th Baud-Rate CTLE and Two-Tap DFE With Boosted High Frequency Gain in 110-nm CMOS

Kim, Yonghun; Kim, Young Ju; Lee, Taeho; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.23, no.3, pp.588 - 592, 2015-03

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