Showing results 1 to 4 of 4
A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme Oh, Kwang-Il; Kim, Lee-Sup; Park, Kwang-Il; Jun, Young-Hyun; Choi, Joo Sun; Kim, Kinam, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.44, pp.2222 - 2232, 2009-08 |
Gated three-terminal device architecture to eliminate persistent photoconductivity in oxide semiconductor photosensor arrays Jeon, Sanghun; Ahn, Seung-Eon; Song, Ihun; Kim, Chang Jung; Chung, U-In; Lee, Eunha; Yoo, Inkyung; et al, NATURE MATERIALS, v.11, no.4, pp.301 - 305, 2012-04 |
Highly stretchable electric circuits from a composite material of silver nanoparticles and elastomeric fibres Park, Minwoo; Im, Jungkyun; Shin, Minkwan; Min, Yuho; Park, Jaeyoon; Cho, Heesook; Park, Soojin; et al, NATURE NANOTECHNOLOGY, v.7, no.12, pp.803 - 809, 2012-12 |
Low-jitter multi-phase digital DLL with closest edge selection scheme for DDR memory interface Oh, Kwang-Il; Kim, Lee-Sup; Park, Kwang-Il; Jun, Young-Hyun; Kim, Kinam, IEE Electronics Letters, Vol. 44, No. 19, 2008-09 |
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