Browse "EE-Journal Papers(저널논문)" by Author Han, Inhak
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| Folded circuit synthesis: min-area logic synthesis using dual-edge-triggered flip-flops Han, Inhak; Shin, Youngsoo, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.23, no.5, pp.61:1 - 61:21, 2018-08 |
| Simplifying Clock Gating Logic by Matching Factored Forms Han, Inhak; Shin, Youngsoo, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.22, no.6, pp.1338 - 1349, 2014-06 |
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