Showing results 2 to 9 of 9
High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV) Kim, Joo-Hee; Pak, Jun-So; Cho, Jong-Hyun; Song, Eak-Hwan; Cho, Jeong-Hyeon; Kim, Hee-Gon; Song, Tai-Gon; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.181 - 195, 2011-02 |
High-Frequency Scalable Modeling and Analysis of a Differential Signal Through-Silicon Via Kim, Joo-Hee; Cho, Jong-Hyun; Kim, Joungho; Yook, Jong-Min; Kim, Jun Chul; Lee, Junho; Park, Kunwoo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.4, no.4, pp.697 - 707, 2014-04 |
High-Frequency Temperature-Dependent Through-Silicon-Via (TSV) Model and High-Speed Channel Performance for 3-D ICs Lee, Man Ho; Jung, Daniel Hyunsuk; Kim, Hee-Gon; Cho, Jong-Hyun; Kim, Joungho, IEEE DESIGN & TEST OF COMPUTERS, v.33, no.2, pp.17 - 29, 2016-03 |
Measurement and Analysis of a High-Speed TSV Channel Kim, Hee-Gon; Cho, Jong-Hyun; Kim, Myung-Hoi; Kim, Ki-Yeong; Lee, Jun-Ho; Lee, Hyung-Dong; Park, Kun-Woo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.2, no.10, pp.1672 - 1685, 2012-10 |
Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects Kim, Ki-Yeong; Hwang, Chul-Soon; Koo, Kyoung-Choul; Cho, Jong-Hyun; Kim, Hee-Gon; Kim, Joung-Ho; Lee, Jun-Ho; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.2, no.12, pp.2057 - 2070, 2012-12 |
Modeling and Analysis of Through-Silicon Via (TSV) Noise Coupling and Suppression Using a Guard Ring Cho, Jong-Hyun; Song, Eak-Hwan; Yoon, Ki-Hyun; Pak, Jun-So; Kim, Joo-Hee; Lee, Woo-Jin; Song, Tai-Gon; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.220 - 233, 2011-02 |
PDN Impedance Modeling and Analysis of 3D TSV IC by Using Proposed P/G TSV Array Model Based on Separated P/G TSV and Chip-PDN Models Pak, Jun-So; Kim, Joo-Hee; Cho, Jong-Hyun; Kim, Ki-Yeong; Song, Tai-Gon; Ahn, Seung-Young; Lee, Jun-Ho; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.208 - 219, 2011-02 |
Through-Silicon Via Capacitance-Voltage Hysteresis Modeling for 2.5-D and 3-D IC Kim, Dong-Hyun; Kim, Youngwoo; Cho, Jong-Hyun; Bae, Bumhee; Park, Junyong; Lee, Hyunsuk; Lim, Jaemin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.6, pp.925 - 935, 2017-06 |
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