Showing results 1 to 5 of 5
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache Li, Zhiyong; Kim, Sangjin; Im, DongSeok; Han, Donghyeon; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.3, pp.614 - 623, 2023-03 |
An Ultra-low-power Mixed-mode Face Recognition Processor for Always-on User Authentication in Mobile Device Kim, Ji-Hoon; Kim, Changhyeon; Kim, Kwantae; Lee, Juhyoung; Yoo, Hoi-Jun; Kim, Joo-Young, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.20, no.6, pp.499 - 509, 2020-12 |
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC Im, Dongseok; Park, Gwangtae; Ryu, Junha; Li, Zhiyong; Kang, Sanghoon; Han, Donghyeon; Lee, Jinsu; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.1, pp.177 - 188, 2023-01 |
Exploiting intellectual properties with imprecise design costs for system-on-chip synthesis Kim, BW; Kyung, Chong-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.10, no.3, pp.240 - 252, 2002-06 |
Low-power network-on-chip for high-performance SoC design Lee, Kang-Min; Lee, Se-Joong; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.14, pp.148 - 160, 2006-02 |
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