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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| ACCENT : A CISC-Type Configurable Processor Core Chang, Y.S.; Park, B.I.; Yang, W.S.; Oh, H.S.; Park, In-Cheol; Kyung, Chong-Min, '98 ASIC ON PROCEEDINGS, pp.195 - 198, 1998-10 | |
| A Regular Layout Structured Multiplier Based on Weighted Carry-Save Adders Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, ICCD'99(International Conference on Computer Design), pp.243 - 248, 1999-10 | |
| Customization of a CISC processor core for low-power applications Chang, Y.S.; Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, ICCD'99(International Conference on Computer Design), pp.152 - 157, 1999-10 | |
| A Fast Sine/Cosine Generator with Pipelined CORDIC and Table Lookup Method Shin, M.C.; Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, '98 ASIC ON PROCEEDINGS, pp.281 - 284, 1998-10 | |
| Conforming Inverted Data Store for Low Power Memory Kyung, Chong-Min; Chang, Y.S.; Park, B.I., International Symposium on Low Power Electronics and Design(ISLPED'99), pp.91 - 93, 1999-08 | |
| Early in-system verification of behavioral chip models Park, C.J.; Lee, S.J.; Park, B.I.; Choi, H.; Lee, J.G.; Kim, Y.I.; Park, In-Cheol; Kyung, Chong-Min, High-level Design Validation and Test Workshop 1999, pp.61 - 65, 1999-09 | |
| An Efficient Approach to Functional Verification of Complex Processors Lee, S.J.; Won, N.R.; Cho, H.C.; Park, B.I.; Chang, Y.S.; Park, S.I.; Park, In-Cheol; Kyung, Chong-Min, International Conference on Chip Technology, 1998-04 | |
| A New Single-Clock Flip-Flop for Half-Swing Clocking Kwon, Y.S.; Park, B.I.; Park, In-Cheol; Kyung, Chong-Min, ASP-DAC'99, pp.117 - 120, ASP-DAC, 1999-01 |
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