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Results 1-10 of 20 (Search time: 0.005 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Fabrication of Vertical Cavity Surface Emitting Laser Diode Yoo, Hoi-Jun; Sherer, A.; Jewell, J.; Harbinson, J., Integrated Optics Conference, 1990 | |
| Low series resistance front surface emitting laser diode Yoo, Hoi-Jun; Kwon, Young Se; Hayes, J.R.; Paek, E.G.; Harbinson, J.P.; Florez, L.T., Annual IEEE Device Research Conference(DRC), 1990 | |
| High Precision MBE Growth of Vertical Cavity Surface Emitting Lasers Yoo, Hoi-Jun; Harbinson, J.P.; Florez, L.; Scherer, A.; Chang, C.; Lehman, A. V.; Orenstein, M.; Clausen, E., Optical Fiber Conference, 1991 | |
| A Precision CMOS Voltage Reference with Enhanced Stability for the Application to Advanced VLSI's Yoo, Hoi-Jun; Lee, S.J.; Kwon, J.T.; Min, W.S.; Oh, K.H., 93 IEEE International Symposium on Circuits and Systems, pp.1318 - 1321, 1993 | |
| A Fast Synchronous Pipelined DRAM(SP-DRAM) Architecture with SRAM Buffers Yoo, Hoi-Jun; Yoon, Chi-Woen; Im, Yon-Kyun; Han, Seon-Ho; Jung, Tae-Sung, International Conference on VLSI and CAD, pp.285 - 288, 1999 | |
| The CMOS Temperature Sensor and Cyclic ADC for Low Power Single Chip DTCXO Yoo, Hoi-Jun; Lee, Joo-Ho; Han, Seon-Ho, International Conference on VLSI and CAD, pp.599 - 601, 1999 | |
| A VPM Architecture for a Fast Row-Cycle DRAM Yoo, Hoi-Jun; Yoon, Chi-Woen; Im, Yon-Kyun; Han, Seon-Ho; Jung, Tae-Sung, IEEE Asia Pacific Conference on ASICs, pp.388 - 391, 1999 | |
| A Low Noise Folded Bit-Line Sensing Architecture for Multi-Gb DRAM with Ultra High Density 6F2 Cell Yoo, Hoi-Jun, , 1997 | |
| A Compact Ring Delay Line for Low Power High Speed Synchronous DRAM Yoo, Hoi-Jun, 98 Synmposium of VLSI Circuits, 1998 | |
| A Low Noise 32bit-Wide 256M Synchronous DRAM with Column Decoded I/O Line Yoo, Hoi-Jun, 95 Symp. of VLSI Circuits, 1995 |