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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| A Frequency Clock Distribution Scheme Using Bond-Wire Inductor Kim, Joungho; Lee, Woojin; Pak, Jun So; Pak, Jiwoo; Ryu, Chunghyun; Park, Jongbae, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 2008 | |
| Multi-Stacking Through-Silicon-Via Effects on Signal Integrity and Power Integrity for Application of 3-Dimensional Stacked-Chip-Package Kim, Joungho; Pak, Jun So; Ryu, Chunghyun, Presented at XXIX General Assembly of International Union of Radio Science (URSIGA 2008), 2008 | |
| A 6.4Gbps On-chip Eye Opening Monitor Circuit for Signal Integrity Analysis of High Speed Channel Kim, Joungho; Shin, Mincheol; Shim, Jongjoo; Kim, Jaemin; Pak, Jun So; Hwang, Chulsoon; Yoon, Changwook; Kim, Hyungsoo; Park, Kunwoo; Kim, Yongju, Presented at Proceeding of 2008 IEEE EMC Symposium, pp.1 - 7, 2008-08 | |
| Slots on Ground Fillings of Multi-layer Printed Circuit Board for Suppressing Indirect Crosstalk between Digital Clock Line and RF Signal Line in Mixed Mode Mobile Systems Pak, Jun So; Hong, Frank; Kim, Austin; Kim, Joungho; Kim, Gawon, Presented at Proceeding of 2008 IEEE EMC Symposium, pp.1 - 6, IEEE, 2008-10-14 |
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