Results 1-7 of 7 (Search time: 0.004 seconds).
NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
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A compact, low-cost, and wide-band passive equalizer design using multi-layer PCB parasitics Song, E.; Kim, J.; Kim, Joungho; Cho, J., 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.165 - 168, IEEE, 2010-10-25 | |
TSV modeling and noise coupling in 3D IC Kim, Joungho; Cho, J.; Kim, J., 3rd Electronics System Integration Technology Conference, ESTC 2010, ESTC 2010, 2010-09-13 | |
I/O power estimation and analysis of high-speed channels in Through-Silicon Via (TSV)-based 3D IC Kim, Joungho; Cho, J.; Pak, J.S.; Song, T.; Kim, J.; Lee, H.; Lee, J.; Park, K., 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.41 - 44, IEEE, 2010-10-25 | |
Through Silicon Via (TSV) shielding structures Cho, J.; Kim, Joungho; Song, T.; Pak, J.S.; Kim, J.; Lee, H.; Lee, J.; Park K., 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.269 - 272, IEEE, 2010-10-25 | |
Guard ring effect for Through Silicon Via (TSV) noise coupling reduction Cho, J.; Yoon, K.; Pak, J.S.; Kim, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24 | |
Modeling and analysis of differential signal Through Silicon Via (TSV) in 3D IC Kim, J.; Pak, J.S.; Cho, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24 | |
Slow wave and dielectric quasi-TEM modes of metal-insulator-semiconductor (MIS) structure through silicon via (TSV) in signal propagation and power delivery in 3D chip package Pak, Jun So; Cho, J.; Kim, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 60th Electronic Components and Technology Conference, ECTC 2010, pp.667 - 672, ECTC 2010, 2010-06-01 |
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