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Results 11-20 of 197 (Search time: 0.007 seconds).

NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
11
Low noise THz Emitter Using Lift-off LT-GaAs Thin Film Sitch on Fused Silica

Kim, Joungho; Baek, Seungyong; Lee, Jongjoo; Ryu, Jaeyoung; Jung, Yuchul; Lee, Heeseok, International Terahertz workshop 2000, 2000

12
Application of a 3-D Field Solver for On-chip and Package Microstrip Interconnection Design

Kim, Joungho; Ryu, Woonghwan; Lu, Albert; Wai, Chee; Wei, Fan, IEEE EPTC 2000, IEEE, 2000

13
The improvement of Signal Integrity (SI) according to the location of via in the vicinity of a slot in the reference plane

Kim, T.H.; Lee, J.; Kim, H.; Jun, P.J.; Kim, Joungho, 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.185 - 188, IEEE, 2002-05-12

14
Slot transmission line model of interconnections crossing split power/ground plane on high-speed multi-layer board

Kim, Joungho; Kim, H.; Jeong, Y.; Lee, J.; Kim, J., 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.23 - 26, 2002-05-12

15
Unit-cell modeling of high-speed interconnect with adjacent metal-filled via array using FDTD method

Lee, Heeseok; Park C.; Kam D.; Kim, Joungho, 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.41 - 43, IEEE, 2002-05-12

16
Microwae Frequency Model and High-density design of Multiple Line Grid Array (MLGA) Package

Kim, Joungho; Ahn, Seungyoung; Lee, Joonwoo; Kim, Jonghoon; Ryu, Woonghwan; Kim, Youngsoo; Choi, Hyun Seok; Kum, Byung Hun; Yoon, Chong K., IMAPS 2000, 2000

17
GHz twisted differential line structure on printed circuit board to minimize EMI and crosstalk noises

Kam, D.G.; Lee, H.; Baek, S.; Park, B.; Kim, Joungho, 52nd Electronic Components and Technology Conference, pp.1058 - 1065, 2002-05-28

18
Design guidelines of spread spectrum clock for suppression of radiation and interference from high-speed interconnection line

Kim, J.; Jun, P.; Byun, J.-G.; Kim, Joungho, 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.189 - 192, IEEE, 2002-05-12

19
Solution Space Analysis of Interconnects for Low voltage Differencial Signaling(LVDS)Applications

Kim, Joungho; Ahn, S; Lu, A C W.; Fan, W; Wai, L L, IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP2001), pp.297 - 330, 2001

20
Effect of power/ground partitioning and stitching capacitor placement on signal integrity and emi of multi-layer and multi power system

Kim, Joungho; Kim, H.; Lee, H.; Kim, J.; Kim, J., Pacific Rim/International, Intersociety Electronic Packaging Technical/Business Conference and Exhibition, v.1, pp.59 - 62, 2001-07-08

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