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Results 41-46 of 46 (Search time: 0.005 seconds).

NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
41
Spread spectrum clock generator with delay cell array to reduce the EMI from a high-speed digital system

Kim, J.; Kam, D.G.; Kim, Jounghoresearcher, 2004 International Symposium on Electromagnetic Compatibility, EMC 2004, v.3, pp.820 - 825, IEEE, 2004-08-09

42
Design and analysis of improved multi-module memory bus using Wilkinson power divider

Kim, J.; Song, E.; Kim, J.; Kim, Jounghoresearcher; Sung, M.; Kim, J.; So, B., IEEE International Symposium on Electromagnetic Compatibility, EMC 2006, pp.642 - 645, IEEE, 2006-08-14

43
Networks-in-package; design, analysis and implementation

Kim, G.; Lee, K.; Kim, J.; Bae, K.; Lee, C.; Yoo, H.-J.; Kim, Jounghoresearcher, 14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP, pp.221 - 224, IEEE, 2006-10-23

44
Wideband low power distribution network impedance of high chip density package using 3-D stacked through silicon vias

Pak, J.S.; Ryu, C.; Kim, J.; Shim, Y.; Kim, G.; Kim, Jounghoresearcher, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.351 - 354, IEEE, 2008-05-19

45
Chip-package co-modeling & verification of noise coupling & generation in CMOS DC/DC buck converter

Song, T.; Kim, J.; Pak, J.; Kim, Jounghoresearcher, 20th International Zurich Symposium on Electromagnetic Compatibility, EMC Zurich 2009, pp.285 - 288, IEEE, 2009-01-12

46
Modeling of hierarchical power/ground network based on segmentation method for package/board co-design and simulation

Kim, J.; Jeong, Y.; Kim, J.; Lee, J.; Shim, J.; Kim, Jounghoresearcher, 2006 IEEE International Symposium on Electromagnetic Compatibility, EMC 2006, pp.16 - 19, IEEE, 2006-08-14

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