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Results 11-20 of 20 (Search time: 0.005 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| A Novel Spire Clip-type Pogo Connector Design with High Electrical and Thermal Reliability Kim, Keunwoo; Kim, Joungho; Son, Keeyoung; Hong, Seokwoo, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Modeling and Analysis of System-Level Power Supply Noise Induced Jitter (PSIJ) for 4 Gbps High Bandwidth Memory (HBM) I/O Interface Shin, TaeIn; Kim, Joungho; Park, Hyunwook; Kim, Keunwoo; Kim, SeongGuk; Son, Keeyoung; Park, Gap Yeol; Park, Joonsang; Choi, Seonguk, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Signal Integrity Design and Analysis of a Spiral Through-Silicon Via (TSV) Array Channel for High Bandwidth Memory (HBM) Kim, SeongGuk; Kim, Joungho; Shin, TaeIn; Park, Hyunwook; Lho, Daehwan; Son, Keeyoung; Kim, Keunwoo; Park, Joonsang; Choi, Seonguk; Kim, Haeyeon, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Neural Language Model Enables Extremely Fast and Robust Routing on Interposer Kim, Minsu; Kim, Joungho; Park, Hyunwook; Choi, Seonguk; Kim, Haeyeon; Kim, SeongGuk; Son, Keeyoung; Kim, Keunwoo; Lho, Daehwan, Designcon 2021, IEEE, 2021-08-17 | |
| Modeling and Verification of a High Voltage Fuse for High Reliability and Safety in Electric Vehicle Kim, Subin; Shin, Taein; Jeong, Seungtaek; Kang, Hyungmin; Son, Keeyoung; Park, Shinyoung; Kim, Hyunho; Choi, Jaegi; Kim, Minkyu; Kim, Hoon; Kim, Joungho, 2020 IEEE International Symposium on Electromagnetic Compatibility and Signal/Power Integrity, EMCSI 2020, pp.287 - 292, Institute of Electrical and Electronics Engineers Inc., 2020-07 | |
| Deep Reinforcement Learning-based Interconnection Design for 3D X-Point Array Structure Considering Signal Integrity Son, Kyungjune; Kim, Minsu; Park, Hyunwook; Park, Shinyoung; Park, Gap Yeol; Lho, Daewhan; Kim, Seoungguk; Shin, Taein; Son, Keeyoung; Kim, Keunwoo; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Deep Neural Network-based Lumped Circuit Modeling using Impedance Curve Lho, Daehwan; Park, Hyunwook; Kim, Seongguk; Shin, Taein; Kim, Keunwoo; Son, Kyungjune; Kang, Hyungmin; Sim, Boogyo; Son, Keeyoung; Kim, Minsu; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Policy Gradient Reinforcement Learning-based Optimal Decoupling Capacitor Design Method for 2.5-D/3-D ICs using Transformer Network Park, Hyunwook; Kim, Minsu; Kim, Subin; Jeong, Seungtaek; Kim, Seongguk; Kang, Hyungmin; Kim, Keunwoo; Son, Keeyoung; Park, Gapyeol; Son, Kyungjune; Shin, Taein; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Deep Reinforcement Learning-based through Silicon Via (TSV) Array Design Optimization Method considering Crosstalk Kim, Keunwoo; Park, Hyunwook; Lho, Daehwan; Kim, Minsu; Son, Keeyoung; Son, Kyungjune; Kim, Seongguk; Shin, Taein; Choi, Seonguk; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Design and Analysis of Thermal Transmission Line based Embedded Cooling Structures for High Bandwidth Memory Module and 2.5D/3D ICs Son, Keeyoung; Kim, Subin; Park, Shinyoung; Park, Hyunwook; Kim, Keunwoo; Shin, Taein; Kim, Minsu; Son, Kyungjune; Park, Gap Yeol; Jeong, Seung Taek; Kim, Joungho, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 |
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