Results 1-7 of 7 (Search time: 0.006 seconds).
NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
---|---|
A Novel Through Mold Plate (TMP) for Signal and Thermal Integrity Improvement of High Bandwidth Memory (HBM) Son, Keeyoung; Kim, Subin; Park, Hyunwook; Kim, Seongguk; Kim, Keunwoo; Park, Shinyoung; Sim, Boogyo; Jeong, Seungtaek; Park, Gapyeol; Kim, Joungho, IEEE-MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO), IEEE, 2020-12 | |
Convolutional Neural Network-based Fast and Accurate Irregular Shape Power/Ground Plane Impedance Estimation Method for High-Speed Signaling Kim, Keunwoo; Lho, Daehwan; Park, Hyunwook; Son, Keeyoung; Kim, Seongguk; Park, Shinyoung; Sim, Boogyo; Kim, Subin; Kim, Joungho, IEEE-MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO), IEEE, 2020-12 | |
Deep Reinforcement Learning-based Interconnection Design for 3D X-Point Array Structure Considering Signal Integrity Son, Kyungjune; Kim, Minsu; Park, Hyunwook; Park, Shinyoung; Park, Gap Yeol; Lho, Daewhan; Kim, Seoungguk; Shin, Taein; Son, Keeyoung; Kim, Keunwoo; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
Deep Neural Network-based Lumped Circuit Modeling using Impedance Curve Lho, Daehwan; Park, Hyunwook; Kim, Seongguk; Shin, Taein; Kim, Keunwoo; Son, Kyungjune; Kang, Hyungmin; Sim, Boogyo; Son, Keeyoung; Kim, Minsu; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
Policy Gradient Reinforcement Learning-based Optimal Decoupling Capacitor Design Method for 2.5-D/3-D ICs using Transformer Network Park, Hyunwook; Kim, Minsu; Kim, Subin; Jeong, Seungtaek; Kim, Seongguk; Kang, Hyungmin; Kim, Keunwoo; Son, Keeyoung; Park, Gapyeol; Son, Kyungjune; Shin, Taein; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
Deep Reinforcement Learning-based through Silicon Via (TSV) Array Design Optimization Method considering Crosstalk Kim, Keunwoo; Park, Hyunwook; Lho, Daehwan; Kim, Minsu; Son, Keeyoung; Son, Kyungjune; Kim, Seongguk; Shin, Taein; Choi, Seonguk; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
Design and Analysis of Thermal Transmission Line based Embedded Cooling Structures for High Bandwidth Memory Module and 2.5D/3D ICs Son, Keeyoung; Kim, Subin; Park, Shinyoung; Park, Hyunwook; Kim, Keunwoo; Shin, Taein; Kim, Minsu; Son, Kyungjune; Park, Gap Yeol; Jeong, Seung Taek; Kim, Joungho, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 |
Discover