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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Convolutional Neural Network-based Fast and Accurate Irregular Shape Power/Ground Plane Impedance Estimation Method for High-Speed Signaling Kim, Keunwoo; Lho, Daehwan; Park, Hyunwook; Son, Keeyoung; Kim, Seongguk; Park, Shinyoung; Sim, Boogyo; Kim, Subin; Kim, Joungho, IEEE-MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO), IEEE, 2020-12 | |
| Crosstalk-included PAM-4 Worst Eye Diagram Estimation Method for High-speed Serial Links Park, Hyunwook; Kim, Joungho; Kim, Keunwoo; Sim, BooGyo; Lho, Daehwan; Shin, TaeIn; Son, Keeyoung; Song, Jinwook, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
| Design and Analysis of HDMI 2.1 Connector for Crosstalk Reduction using Tabs and Inverse Tabs Lho, Daehwan; Kim, Joungho; Park, Hyunwook; Park, Gap Yeol; Park, Joonsang; Son, Kyungjune; Sim, BooGyo; Kang, Hyungmin; Kim, SeongGuk; Shin, TaeIn; Kim, Keunwoo; Son, Keeyoung, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
| Signal Integrity Analysis of High Speed Channel considering Thermal Distribution Son, Keeyoung; Kim, Joungho; Kim, SeongGuk; Lho, Daehwan; Kim, Keunwoo; Park, Hyunwook; Park, Gap Yeol, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
| Signal Integrity Design and Analysis of a Spiral Through-Silicon Via (TSV) Array Channel for High Bandwidth Memory (HBM) Kim, SeongGuk; Kim, Joungho; Shin, TaeIn; Park, Hyunwook; Lho, Daehwan; Son, Keeyoung; Kim, Keunwoo; Park, Joonsang; Choi, Seonguk; Kim, Haeyeon, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Neural Language Model Enables Extremely Fast and Robust Routing on Interposer Kim, Minsu; Kim, Joungho; Park, Hyunwook; Choi, Seonguk; Kim, Haeyeon; Kim, SeongGuk; Son, Keeyoung; Kim, Keunwoo; Lho, Daehwan, Designcon 2021, IEEE, 2021-08-17 | |
| Deep Neural Network-based Lumped Circuit Modeling using Impedance Curve Lho, Daehwan; Park, Hyunwook; Kim, Seongguk; Shin, Taein; Kim, Keunwoo; Son, Kyungjune; Kang, Hyungmin; Sim, Boogyo; Son, Keeyoung; Kim, Minsu; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Deep Reinforcement Learning-based through Silicon Via (TSV) Array Design Optimization Method considering Crosstalk Kim, Keunwoo; Park, Hyunwook; Lho, Daehwan; Kim, Minsu; Son, Keeyoung; Son, Kyungjune; Kim, Seongguk; Shin, Taein; Choi, Seonguk; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 |
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