Showing results 1 to 4 of 4
Accelerating Linked-list Traversal Through Near-Data Processing Hong, Byungchul; Kim, Gwangsun; Ahn, Jung Ho; Kwon, Yongkee; Kim, Hongsik; Kim, John, 25th International Conference on Parallel Architectures and Compilation Techniques, PACT 2016, pp.113 - 124, Institute of Electrical and Electronics Engineers Inc., 2016-09 |
Adaptive and flexible key-value stores through soft data partitioning Hong, Byungchul; Kwon, Yongkee; Ahn, Jung Ho; Kim, John Dongjun, 34th IEEE International Conference on Computer Design, ICCD 2016, pp.296 - 303, Institute of Electrical and Electronics Engineers Inc., 2016-10 |
Multiple Clone Row DRAM: A Low Latency and Area Optimizded DRAM Choi, Jungwhan; Shin, wongyu; Jang, Jaemin; Suh, Jinwoong; Kwon, Yongkee; Moon, Youngsuk; Kim, Lee-Sup, 2015 ACM/IEEE International Symposium on Computer Architecture, ACM SIGGRAPH and IEEE TCCA, 2015-06-15 |
Multiple clone row DRAM: A low latency and area optimized DRAM Choi, Jungwhan; Shin, Wongyu; Jang, Jaemin; Suh, Jinwoong; Kwon, Yongkee; Moon, Youngsuk; Kim, Lee-Sup, 42nd Annual International Symposium on Computer Architecture, ISCA 2015, pp.223 - 234, Institute of Electrical and Electronics Engineers Inc., 2015-06 |
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