Showing results 1 to 3 of 3
A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS Lee, Daewoong; Lee, Dongil; Kim, Yong-Hun; Kim, Lee-Sup, 33rd Symposium on VLSI Circuits, VLSI Circuits 2019, pp.C196 - C197, The IEEE Solid-State Circuits Society,The Japan Society of Applied Physics, 2019-06-12 |
A 20 Gbps 1-Tap Decision Feedback Equalizer with Unfixed Tap Coefficient Kim, Yong-Hun; Kim, Lee-Sup, 2012 IEEE International Symposium on Circuits and Systems, IEEE, 2012-05-21 |
An Integrated Time Register and Arithmetic Circuit with Combined Operation for Time-Domain Signal Processing Lee,Daewoong; Lee,Dongil; Lee,Taeho; Kim, Yong-Hun; Kim, Lee-Sup, 2015 IEEE International Symposium on Circuits and Systems, IEEE, 2015-05-26 |
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