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Showing results 1 to 4 of 4

1
1.8mW, hybrid-pipelined H.264/AVC decoder for mobile devices

Na, S.; Hwangbo, W.; Kim, J.; Lee, S.; Kyung, Chong-Min, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC, pp.192 - 195, 2007-11-12

2
A high-performance 2-D inverse transform architecture for the H.264/AVC decoder

Hwangbo, W.; Kim, J.; Kyung, Chong-Min, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.1613 - 1616, 2007-05-27

3
Fast estimation of software energy consumption using IPI(inter-prefetch interval) energy model

Kim, J.; Kang, K.; Shim, H.; Hwangbo, W.; Kyung, Chong-Min, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC, pp.224 - 229, 2007-10-15

4
Top-down implementation of pipelined AES cipher and its verification with FPGA-based simulation accelerator

Lee J.-G.; Hwangbo, W.; Kim S.; Kyung, Chong-Min, ASICON 2005: 2005 6th International Conference on ASIC, v.1, pp.140 - 143, 2005-10-24

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