Showing results 1 to 10 of 10
A novel Hafnium Carbide Metal Gate Electrode for NMOS Device Application Cho, Byung Jin; Hwang, WS; Shen, C; Wang, XP; Chan, DSH, 2007 Symposium on VLSI Technology, pp.156 - 157, 2007-06-12 |
Damage free etching of RuO2 in O2/He plasma Cho, Byung Jin; Hwang, WS; Bliznetsov, VN; Chan, DSH; Yoo, WJ, 28th International Symposium on Dry Process, pp.0 - 0, 2006-11-29 |
Dual Metal Gate Process by Metal Substitution of Dopant-Free Polysilicon on High-K Dielectric Cho, Byung Jin; Park, CS; Hwang, WS; Loh, WY; Tang, LJ; Kwong, DL, Symposium on VLSI Technology, pp.48 - 49, 2005-06-14 |
Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning Cho, Byung Jin; Park, CS; Lwin, PW; Wong, SY; Pu, J; Hwang, WS, 3rd International Conference on Materials for Advanced Technologies, pp.41 - 41, 2005-07-03 |
Effects of Low Energy Nitrogen Plasma on the Removal of HfSiON Cho, Byung Jin; Hwang, WS; Yoo, WJ; Chan, DSH, AVS 53rd International Symposium, pp.0 - 0, 2006-11-12 |
Feasibility of Metal Carbides for Metal Gate CMOS Devices (Invited) Cho, Byung Jin; Hwang, WS, SEMI Technology Symposium, pp.233 - 238, 2008-01-10 |
Metal Carbide Electrodes for Gate-First Metal Gate CMOS Process Cho, Byung Jin; Hwang, WS; Chan, DSH, IEEE 4th International Symposium on Advanced Gate Stack Technology, pp.0 - 0, 2007-09-10 |
Novel ZrO2/Si3N4 Dual Charge Storage Layer to Form Step-Up Potential Wells for Highly Reliable Multi-Level Cell Application Cho, Byung Jin; Zhang, G; Hwang, WS; Bobade, SM; Lee, SH; Yoo, WJ, International Electron Device Meeting (IEDM) 2007, pp.0 - 0, 2007-12-01 |
Strain Analysis of a Single-crystalline Silicon Membrane using FEM Simulation Kim, Choelgyu; Bong, JH; Hwang, WS; Cho, Byung Jin; Kim, Taek Soo, MPC 2016 Autumn Symposium, MPC, 2016-09-23 |
Study on nonvolatile byproducts generated during etching of advanced gate stacks Cho, Byung Jin; Hwang, WS; Chan, DSH; Yoo, WJ, 28th International Symposium on Dry Process, pp.0 - 0, 2006-11-29 |
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