Showing results 1 to 5 of 5
7.1GB/sec Bandwidth 3D Rendering Engine Using the EML Technology Yoo, Hoi-Jun; Park, Yong-Ha; Woo, Ramchan; Han, Seon-Ho; Kim, Jung-Su; Lee, Se-Joong; Kook, Jeong-Hoon; et al, International Conference on VLSI and CAD, pp.277 - 280, 1999 |
A Fast Lock-On Time Mixed Mode DLL with 10ps Jitter Yoo, Hoi-Jun; Han, Seon-Ho; Lee, Joo-Ho, International Conference on VLSI and CAD, pp.564 - 565, 1999 |
A Fast Synchronous Pipelined DRAM(SP-DRAM) Architecture with SRAM Buffers Yoo, Hoi-Jun; Yoon, Chi-Woen; Im, Yon-Kyun; Han, Seon-Ho; Jung, Tae-Sung, International Conference on VLSI and CAD, pp.285 - 288, 1999 |
A VPM Architecture for a Fast Row-Cycle DRAM Yoo, Hoi-Jun; Yoon, Chi-Woen; Im, Yon-Kyun; Han, Seon-Ho; Jung, Tae-Sung, IEEE Asia Pacific Conference on ASICs, pp.388 - 391, 1999 |
The CMOS Temperature Sensor and Cyclic ADC for Low Power Single Chip DTCXO Yoo, Hoi-Jun; Lee, Joo-Ho; Han, Seon-Ho, International Conference on VLSI and CAD, pp.599 - 601, 1999 |
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