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Showing results 1 to 5 of 5

1
A 0.18um CMOS 10Gb/s 1:4 DEMUX using replica-bias circuits for optical receiver

Hong, J.-P.; Ha, K.-S.; Kim, Lee-Sup, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.5708 - 5711, 123, 2006-05-21

2
A 3.2-Gb/s transceiver with a quarter-rate linear phase detector reducing the phase offset

Ha, K.-S.; Kim, Lee-Sup, 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008, pp.217 - 220, 2008-11-03

3
A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces

Ha, K.-S.; Kim, Lee-Sup; Bae, S.-J.; Park, K.-I.; Choi, J.S.; Jun, Y.-H.; Kim, K., 2009 IEEE International Solid-State Circuits Conference ISSCC 2009, pp.138 - 139, 2009-02-08

4
A data pattern-tolerant adaptive equalizer using spectrum balancing method

Joo, H.-Y.; Ha, K.-S.; Kim, Lee-Sup, 2009 Symposium on VLSI Circuits, pp.220 - 221, 2009-06-16

5
Charge-pump reducing current mismatch in DLLs and PLLs

Ha, K.-S.; Kim, Lee-Sup, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.2221 - 2224, IEEE, 2006-05-21

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