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Showing results 1 to 7 of 7

1
A Feasibility Study of Tri-Gate Silicon Nanowire Field-Effect Transistor for Neural Signal Recording

Kang, Hongki; Kim, Jee Yeon; Choi, Yang Kyu; Nam, Yoonkey, 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, IEEE Engineering in Medicine and Biology Society, 2016-08-19

2
Bistable resistor (Biristor) - Gateless silicon nanowire memory

Han, Jin Woo; Choi, Yang Kyu, Symposium on VLSI Technology, VLSIT 2010, pp.171 - 172, VLSIT, 2010-06-15

3
Experimental study on Quantum Mechanical Effect for Insensitivity of Threshold Voltage against Temperature Variation in Strained SOI MOSFETs

Jeon, Chang Hoon; Lee, Byung Hyun; Jang, Byung Chul; Choi, Sung Yool; Choi, Yang Kyu, IEEE SOI-3D-Subthreshold Microelectronics Unified Conference(S3S), IEEE, 2015-10-08

4
In-depth characterization of silicon nanowire field-effect transistor (SiNW-FET) for neural recording and direct performance comparison with passive MEA

Kang, Hongki; Kim, Jee Yeon; Choi, Yang Kyu; Nam, Yoonkey, 10th Int. Meeting on Substrate-Integrated Microelectrode Arrays, 2016, Natural and Medical Sciences Institute at the University of Tuebingen, 2016-06-29

5
Multilevel resistive switching memory based on GO/MoS2/GO stack

Shin, Gwang Hyuk; Kim, Choong Ki; Bang, Gyeong Sook; Jang, Byung Chul; Woo, Myung Hun; Choi, Yang Kyu; Choi, Sung Yool, AsiaNANO 2016, AsiaNANO 2016, 2016-10-12

6
Multilevel Resistive Switching Memory based on Two-dimensional materials using Simple solution process

Shin, Gwang Hyuk; Kim, Choong-Ki; Bang, Gyeong Sook; Jang, Byung Chul; Woo, Myung Hun; Choi, Yang Kyu; Choi, Sung-Yool, Graphene 2016, Graphene 2016, 2016-04-21

7
Output Enhancement of Triboelectric Energy Harvester by Micro-Porous Triboelectric Layer

Kim, Dae Won; Hwang, Byeon Woon; Han, Jin Woo; Seol, Myeong Lok; Oh, Yura; Choi, Yang Kyu, 2015 IEEE International Electron Devices Meeting, IEEE, 2015-12-08

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