Browse "EE-Conference Papers(학술회의논문)" by Author Choi, Y.K.

Showing results 1 to 12 of 12

1
A Neural Chip with Inner-Product Characteristics and Multi-Layer Neural network Board

Choi, Y.K.; Park, J.B.; Lee, Soo-Young, 3rd Annual Meeting and Conf. Neurla Networks Study Group, pp.69 - 74, 1992-07

2
A Path Planning Algorithm for Positioning Manipulator End Effector in Cartesian Space Using Circular Interpolation

Choi, Y.K.; Bien, Zeung nam; Youn, Myung Joong, 15th International Symposium on Industrial Robots, 1985

3
An Adaptive Regulation Scheme for Manipulators

Choi, Y.K.; Bien, Zeung nam; Chung, Myung Jin; Lyou, J., International Conference on Advanced Robotics, pp.259 - 266, ICAR, 1985-09

4
Analog Electronic Neuro-Chip Sets with On-Chip Learning Capability

Choi, Y.K.; Cho, J.; Lee, Soo-Young, International Symposium on Bioelectronic and Molecular Electronic Devices, pp.259 - 260, 1995-11

5
Expandable Analog Neural Network Chip Set With on-Chip Learning by Error Back-Propagation and Hebbian Learning Rules

Cho, J.W.; Choi, Y.K.; Kwon, S.O.; Lee, Soo-Young, World Congress on Neural Networks, pp.468 - 471, 1995-07

6
Implementation of 224x224 Neural Hardware Using Expandable 32x32 MBAM Neuro-Chip

Choi, Y.K.; Cho, J.W.; Lee, Soo-Young, 94 FAN Spring, pp.397 - 400, 1994-05

7
Modular Analog Neuro-Chip Set with on-Chip Learning by Error-Backpropagation and/or Hebbian Rules

Cho, J.; Choi, Y.K.; Lee, Soo-Young, International Conference on Artificial Neural Networks, pp.25 - 29, 1994-06

8
PATH PLANNING ALGORITHM FOR POSITIONING MANIPULATOR END-EFFECTOR IN CARTESIAN SPACE USING CIRCULAR INTERPOLATION.

Choi, Y.K.; Bien, Zeung nam; Youn, Myung Joong, the 15th International Symposium on Industrial Robots., v.2, pp.1031 - 1040, Robotics Society of Japan, 1985-09-11

9
STANDARD CELL PLACEMENT WITH MULTI-STAGE GRAPH MODEL

Cho, H.G.; Choi, Y.K.; Kyung, Chong-Min, Proceedings - TENCON 87: 1987 IEEE Region 10 Conference, 'Computers and Communications Technology Toward 2000'., pp.769 - 773, 1987-08

10
Subthreshold MOS Implementaion of Neural Networks with On-Chip Error back-propagation Learning

Choi, Y.K.; Lee, Soo-Young, International Joint Conference Neural Networks, pp.25 - 29, 1993-10

11
VLSI Implementaion of Radial Basis Fuction Network with Learning Capability

Choi, Y.K.; Cho, J.; Lee, Soo-Young, International Conference on Neural Information Processing, pp.1341 - 1346, 1995-10

12
VLSI Implementation of Multi-Layer Bidirectional Associative Memory

Choi, Y.K.; Jeong, D.G.; Lee, Soo-Young, 2nd Annual Meeting of Korean Neural Network Study Group, 1991-06

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