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A 6 bit 2 GS/s flash-assisted time-interleaved (FATI) SAR ADC with background offset calibration Sung, BRS; Lee, CK; Kim, W; Kim, JI; Hong, HK; Oh, GG; Lee, CH; et al, 2013 IEEE Asian Solid-State Circuits Conference, pp.281 - 284, IEEE, 2013-11-13 |
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