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Showing results 1 to 6 of 6

1
0.6 v 8.1/0.2μW Ultra-Low-Power Logarithmic Power Detectors Employing Subthreshold MOS Transistors

Kim, Keun-Mok; Seok, Hyun-Gi; Seo, Jeong-Ii; Choi, Kyung-Sik; Lee, Sang-Gug, 2021 IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Institute of Electrical and Electronics Engineers Inc., 2021-11

2
245/243GHz, 9.2/10.5dBm Saturated Output Power, 4.6/2.8% PAE, and 28/26dB Gain Power Amplifiers in 65nm CMOS Adopting 2-And 4-way Power Combining

Yun, ByeongHun; Park, Dae-Woong; Choi, Kyung-Sik; Song, Ho-Jin; Lee, Sang-Gug, 2021 IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Institute of Electrical and Electronics Engineers Inc., 2021-11

3
A 490GHz 32mW Fully Integrated CMOS Receiver Adopting Dual-Locking FLL

Choi, Kyung-Sik; Utomo, Dzuhri Radityo; Kim, Keun-Mok; Yun, Byeong-Hun; Lee, Sang-Gug; Lee, In-Young, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.452 - 454, IEEE, 2020-02

4
A 5 dBm 30.6% Efficiency 915 MHz Transmitter with 210 mu W ULP PLL Employing Frequency Tripler and Digitally Controlled Duty/Phase Calibration Buffer

Choi, Kyung-Sik; Kim, Keun-Mok; Ko, Jinho; Lee, Sang-Gug, IEEE Asian Solid-State Circuits Conference (A-SSCC), IEEE, 2020-11

5
A 915 MHz, 499 μW, –99 dBm, and 100 kbps BFSK Direct Conversion Receiver

Kim, Keun-Mok; Jeong, Eui-Rim; Choi, Kyung-Sik; Kim, Subin; Yun, Byeonghun; Jung, Hyunki; Oh, Wonkab; et al, ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), pp.209 - 212, IEEE, 2019-09-25

6
An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver

Kim, Keun-Mok; Choi, Kyung-Sik; June, Hyunki; Yun, Byeonghun; Kim, Subin; Oh, Wonkab; Lee, Eui-Soo; et al, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, pp.404 - 406, Institute of Electrical and Electronics Engineers Inc., 2022-02-24

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