Scheduling of the photolithography process for semiconductor manufacturing

Abstract

This thesis deals with a scheduling problem of maximizing throughput in wafer fabrication. Wafer fabrication is characterized by such a reentrant process flow, that each job lot is processed at the photolithography workstation as many times as the number of circuit layers, consequently creating scheduling competition for the associated machines. Each of the machines requires a deliberate set-up for processing a different circuit layer. Due to technological restriction, some layers should be reprocessed at the same machine which they started with for their respective first operations. For the problem, a dispatching rule is proposed for wafer fabrication in the photolithography workstation in an attempt to maximize throughput by reducing the number of set-ups. The proposed rule is tested for its performance effectiveness and compared with same related rules suggested in the literature by simulation experiments on one model of a wafer fabrication line where various release policies and set-up times are considered. The simulation tests show the results of considerable improvements of throughput over any other rule, and characterize that the longer set-up time, the higher the throughput improvement.