DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kim, Yeong-Dae | - |
dc.contributor.advisor | 김영대 | - |
dc.contributor.author | Lee, Kyoung-Eun | - |
dc.contributor.author | 이경은 | - |
dc.date.accessioned | 2011-12-14T04:07:44Z | - |
dc.date.available | 2011-12-14T04:07:44Z | - |
dc.date.issued | 2005 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=244205&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/40721 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 산업공학과, 2005.2, [ iii, 54 p. ] | - |
dc.description.abstract | In this thesis, we consider a scheduling problem in a semiconductor test facility, in which tardiness of orders is to be minimized. We focus on the loading/unloading workstation and the burn-in workstation, which may be considered bottleneck workstations in the test facility. In the loading/ unloading workstation, there are unrelated parallel machines, while there are identical parallel batch-processing machines called chambers in the burn-in workstation. Each chamber can process up to B boards simultaneously. A set of wafers is loaded on a board in the loading workstation, before a set of boards can be processed together in the burn-in workstation. We present four types of heuristic algorithms for scheduling problems in the burn-in workstations: extended list scheduling algorithms; look-ahead list scheduling algorithms; algorithms based on an existing heuristic developed for a single machine tardiness problem; and local search algorithms. Also, we develop several algorithms for the loading/unloading workstations. To evaluate performance of the algorithms, a series of computational experiments are performed on randomly generated test problems and results show that the suggested heuristic algorithms work well and outperform the existing rule currently used in a real system. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | burn-in operations | - |
dc.subject | total tardiness | - |
dc.subject | scheduling | - |
dc.subject | Heuristic | - |
dc.subject | semiconductor | - |
dc.subject | 반도체 | - |
dc.subject | 번인 공정 | - |
dc.subject | 총납기지연 | - |
dc.subject | 스케줄링 | - |
dc.subject | 휴리스틱 | - |
dc.title | Heuristics for scheduling burn-in operations in a semiconductor test facility to minimize total tardiness | - |
dc.title.alternative | 반도체 제조 공정 중 번인 공정에서의 납기를 고려한 스케줄링 알고리듬 개발 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 244205/325007 | - |
dc.description.department | 한국과학기술원 : 산업공학과, | - |
dc.identifier.uid | 020033424 | - |
dc.contributor.localauthor | Kim, Yeong-Dae | - |
dc.contributor.localauthor | 김영대 | - |
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