In this thesis, a new linearity improvement technique is proposed to implement a low-distortion Gm-C band-pass filter working in high IF ranges. The purpose of the linearization technique is to eliminate value $G_m$" of the transconductor by employing a superposition method that combines two opposite non-linear behaviors of the two parallel wings designed inside the transconductor. For the band-pass filter, instead of conventional biquad structure, a resonant-coupling structure is adopted for the band-pass filter working at center frequency of 80MHz to make the frequency response flat and stable and to allow a stable frequency tuning as well as a flexible bandwidth tuning. Fabricated in 65nm CMOS process, the implemented IF band-pass filter provides a flat band-pass whose ripple is smaller than 0.1dB, a third-order rejection of 27dB, an IIP3 of -2dBm, and a NF of 21.5dB, while consuming 11mA from 1.2-V supply. The filter occupies a chip size of $0.5 \times 0.5 mm^2$.