PHY inner receiver design for IEEE 802.11n WLAN systemIEEE 802.11n 무선랜 시스템을 위한 물리계층 수신전단부 설계

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Recently, as the mobile devices such as smart-phone are getting popular, converged Wi-Fi and mobile handset market is emerging. To serve this demand, it is necessary to develop physical layer (PHY) that supports high data rates with single antenna. This dissertation presents inner receiver architecture with low latency, symbol timing and frequency synchronization schemes to leading the PHY receiver that complies with IEEE 802.11n standard. The latency requirement specified by MAC protocol allows very little latency to inner receiver signal processing. To overcome this problem, new inner receiver architecture is proposed, in which delay buffer is unnecessary by utilizing reordering time for synchronization tasks. Additionally, with this new architecture, frequency offset compensation can be achieved in single-step by giving adequately secured time for its processing. The overall latency is 7.2 μs, which not only satisfies the requirement (13 μs), but also is about 1.1 μs smaller than the one compared with other reference. Aside from the latency requirement, synchronization tasks, as another factor determining the performance of inner receiver, should be considered. Regarding the symbol timing synchronization, symbol timing scheme base on cross-correlation has been widely used, but its performance in multi-path fading channels with large delay spread is limited. To circumvent this obstacle, new symbol timing synchronization is proposed which is more robust in multipath channel with large delay spread. Proposed scheme makes use of the slope of auto-correlation and the crossover point between sum and difference of auto-correlation. According to simulation results in fading channels with delay spread of 100ns, the proposed scheme has nearly 4dB SNR gain when compared with cross-correlation scheme in 64-QAM of legacy mode. In 802.11n mode, cross-correlation scheme does meet PER criterion even as SNR increases. But the proposed scheme attains PER criterion at SNR of 3...
Park, Sin-Chongresearcher박신종researcher
한국과학기술원 : 정보통신공학과,
Issue Date
466492/325007  / 020075404

학위논문(박사) - 한국과학기술원 : 정보통신공학과, 2011.2, [ viii, 96 p. ]


latency; inner receiver; PHY; synchronization; 동기; 지연; 수신전단기; 물리계층

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