DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Lee, Sang-Gug | - |
dc.contributor.advisor | 이상국 | - |
dc.contributor.author | Nguyen, Huy-Hieu | - |
dc.contributor.author | 뉘엔, 휘휴 | - |
dc.date.accessioned | 2011-12-14T02:25:49Z | - |
dc.date.available | 2011-12-14T02:25:49Z | - |
dc.date.issued | 2010 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=455456&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/39868 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 정보통신공학과, 2010.08, [ xi, 137 p. ] | - |
dc.description.abstract | The automatic gain control (AGC) circuit is an important building block of many systems. A function of the AGC loop, especially in wireless applications, is to automatically adjust the gain of the receiver path so that the signal at the input of the AD converter appears constant regardless of the signal level at the antenna. A variable gain amplifier (VGA) is a key block of AGC loops that are based on both feed-back and feed-forward approaches. While many high-performance VGAs have been implemented successfully with continuous-mode gain variation, with most applications, the VGAs are controlled by various digital circuitries or digital signal processing (DSP) units. Therefore, digitally controlled VGAs (i.e., Programmable Gain Amplifiers) save the need for auxiliary digital-to-analog converters. In this dissertation, design techniques for high performance CMOS-based programmable gain amplifier which features wide dynamic gain range, wide bandwidth, low power consumption, low voltage operation, process/temperature independences, and small chip area are presented. Firstly, a new gain control scheme for wider dynamic gain rage, insensitive to process/temperature variations and a new PGA architecture for power and chip area saving are introduced. Secondly, a new reconfiguration method that consists of two version: all-NMOS transistor and complementary PMOS/NMOS transistor is proposed to further extend the dynamic gain range of single PGA stages while saving chip size and power consumption. The next contribution is a low voltage, low power, high performance PGA using current-reused differential pair. A PGA was designed in 0.18$\mum$ CMOS TSMC to operate under 1.2V to verify the technique. In the forth contribution, a new transconductor that combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion was analyzed. Based on the inverter-based differential with adaptive biasing (IDPAB) transconductor, a high linearity ... | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | amplifier | - |
dc.subject | reconfiguration | - |
dc.subject | digitally-controlled VGA | - |
dc.subject | 가변 이득 앰프 | - |
dc.subject | 프로그램 가능한 게인 앰프 | - |
dc.subject | 증폭기 | - |
dc.subject | 재구성 | - |
dc.subject | 디지털 제어 VGA | - |
dc.subject | variable gain amplifier | - |
dc.subject | programmable gain amplifier | - |
dc.title | High performance programmable gain amplifier designs | - |
dc.title.alternative | 고성능 프로그래머블 이득 증폭기 설계 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 455456/325007 | - |
dc.description.department | 한국과학기술원 : 정보통신공학과, | - |
dc.identifier.uid | 020068056 | - |
dc.contributor.localauthor | Lee, Sang-Gug | - |
dc.contributor.localauthor | 이상국 | - |
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