Study on the A/D conversion error due to capacitance error

Abstract

This purpose of this thesis is the study on the A/D conversion error due to capacitance error. A new approach to track A/D conversion error which is called the ``correlation approach`` is proposed. The study on the kinds of capacitance error says that proper unit capacitor size for 8-bit ADC using the capacitor array is 15 x 15 - 20 x 20 (um x um). It is revealed that the common centroid scheme and the parallel connection of unit capacitors which are proposed to maintain the ratio of capacitance by McCreary, increase the correlation coefficient between capacitors. This result is validated by the measurement of capacitance in Integrated Circuit.