DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kwon, Young-Se | - |
dc.contributor.advisor | 권영세 | - |
dc.contributor.author | Kim, Young-Han | - |
dc.contributor.author | 김영한 | - |
dc.date.accessioned | 2011-12-14T02:22:38Z | - |
dc.date.available | 2011-12-14T02:22:38Z | - |
dc.date.issued | 1985 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=64640&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/39699 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1985.2, [ [ii], 40, [4] p. ] | - |
dc.description.abstract | In this thesis, the fabrication methods of GaAs MESFET with recessed gate structure on VPE grown wafers were presented. After source and drain ohmic contacts, the active layer was chemically etched to the thickness below $2000 \mbox{\AA}$. The active layer thickness was controlled by monitoring the resistance between source and drain during etching. As a result of the channel etching, the depletion mode and enhancement mode FET were fabricated. And the breakdown voltage between gate and drain was increased. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.title | Fabrication of GaAs MESFET with recessed gate structure | - |
dc.title.alternative | Recessed Gate 구조의 GaAs MESFET 제작 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 64640/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 000831078 | - |
dc.contributor.localauthor | Kwon, Young-Se | - |
dc.contributor.localauthor | 권영세 | - |
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