Microprocessor implementation of 2-channel LPC vocoder

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dc.contributor.advisorUn, Chong-Kwan-
dc.contributor.advisor은종관-
dc.contributor.authorLee, Sang-Ji-
dc.contributor.author이상지-
dc.date.accessioned2011-12-14T02:20:27Z-
dc.date.available2011-12-14T02:20:27Z-
dc.date.issued1981-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=63045&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/39552-
dc.description학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1981.2, [ [vi], 100, [13] p. ]-
dc.description.abstractIn this thesis, a microprocessor-based LPC vocoder system is realized. Our main goal is to realize a compact, low-power, and inexpensive 2-channel LPC vocoder with comerically available microprocessors. Our system has the general purpose, two-bus oriented architecture with single CPU and is composed of AMD 2900 bit-slice microprocessor series. But it can be still considered as a special purpose one because of its limited I/O devices and data storage. In addition to realization of the vocoder system, the effect of channel errors on the quality of the LPC synthesized speech was studied on NOVA-4 mini-computer. We simulated the noisy channel effect with the bit error rate ranging from 0.0002 to 0.01. From this study, we found that $k_1$ reflection coefficient is the most sensitive parameter to channel errors, and that in the worst case our system can be operated fairly well even at the bit error rate of 0.002.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.titleMicroprocessor implementation of 2-channel LPC vocoder-
dc.typeThesis(Master)-
dc.identifier.CNRN63045/325007-
dc.description.department한국과학기술원 : 전기 및 전자공학과, -
dc.identifier.uid000791188-
dc.contributor.localauthorUn, Chong-Kwan-
dc.contributor.localauthor은종관-
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