Microprocessor realization of a PCM/ADM and ADM/PCM code converter

Abstract

In this thesis the code conversion of continuously variable slope delta (CVSD) modulation to and from pulse code modulation (PCM) has been studied with emphasis on microprocessor realization in a time sharing mode, performance improvement and comparison between a digital-analg-digital (D-A-D) conversion and a digital-digital (D-D) conversion. Specifically the problem of code conversion between 64K bits/s PCM with $\mu$-255 companding law and 32K bits/s CVSD with 4 bit syllabic companding law and single pole prediction filter has been considered. The study is proceeded in four arears as follows. First, the quantization effects of the overall conversion system has been studied. Comparing a D-D conversion and a D-A-D conversion schemes analytically and by computer simulation have been done. Optimization of the converter parameter values and word lengths has been done also. The overall system performance in SQNR is 22 to 28 dB, its variation depending on the input signal level. Second, a new approach to microprocessor realization of a code conversion using bit slice 2900 series has been studied. The control of the overall system is made by microprograms contained in a control store memory. To increase throughput, we have adopted the parallelism of microinstruction format. Third, In developing the software of the converter, the split multiplication algorithm has been proposed in the environments of interpolation and decimation filters. This enables to reduce the number of multiplication operations significantly. Lastly, the feasibility of using the converter system in a multichannel environment has been studied. Computer Programs developed for simulation of the system are included in a appendices.