In this thesis the code conversion of continuously variable slope delta (CVSD) modulation to and from pulse code modulation (PCM) has been studied with particular emphasis on hardware realization. Specifically, the conversion problem between 64 Kbps PCM with μ-255 companding law and 32 Kbps CVSD with 4 bit syllabic companding law has been investigated.
The study is proceeded in three ways as follows. First, a conversion scheme which has not been studied fully in previous works is suggested with detailed specification Second, the proposed conversion system is simulated on a digital computer to study the system performance. These simulation results show that the system works well and the overall system performance in SQNR is about 20 dB. Lastly, a design scheme for this converter system is suggested in detail. Most important parts of this system are digital filter, compandor and controlling part. In conversion between two signals with different sampling rates, interpolation and decimation filtering are needed. For this purpose a 12-tap Kaiser filter with 8 KHz sampling rate is designed. The arithmatic operation is simplified further with FIR filters than with IIR filters. The companding between linear PCM (LPCM) and compressed PCM (CPCM) signals is done by the digital compandor. In this system a table - look-up method is used as a digital compandor, which can be realized with a ROM and a few IC chips. In addition, a microprogram contained in ROM is used for the system control.