Tolerance optimization in the circuit design permitting tuning components가변소자를 고려한 회로설계에서의 부품공차 최적화
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | Park, Song-Bae | - |
| dc.contributor.advisor | 박송배 | - |
| dc.contributor.author | Huh, Youm | - |
| dc.contributor.author | 허염 | - |
| dc.date.accessioned | 2011-12-14T02:18:38Z | - |
| dc.date.available | 2011-12-14T02:18:38Z | - |
| dc.date.issued | 1976 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=62014&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/39431 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1976.2, [ viii, 64, 14 p. ] | - |
| dc.description.abstract | In this study, a method for assigning optimal tolerance values for the circuit parameters is suggested when one or more tuning components exist in the circuit. Component tolerances are optimized on the worst case basis (or 100\% yield) by using nonlinear programming from a viewpoint of continuous tolerance value and by the method of tolerance extension by tuning. And also, design centering problem is s ved simultaneously with tolerance optimization. As an example, an active RC equalizer is considered and its results are shown. | eng |
| dc.language | eng | - |
| dc.publisher | 한국과학기술원 | - |
| dc.title | Tolerance optimization in the circuit design permitting tuning components | - |
| dc.title.alternative | 가변소자를 고려한 회로설계에서의 부품공차 최적화 | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 62014/325007 | - |
| dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
| dc.identifier.uid | 000741141 | - |
| dc.contributor.localauthor | Park, Song-Bae | - |
| dc.contributor.localauthor | 박송배 | - |
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