Implementation and performance analysis of a small ring interface unit

Abstract

In this thesis, we investigated the design and performance of a local area network interface unit which is compatible to IEEE 802.5 token passing ring networks. First, we considered the implementation problem of a small ring interface unit(S-RIU). Next, we analyzed this system by considering the access waiting time to common memory(CM). Also, we considered the access waiting time to common memory (CM). Also, we considered the access delay to a dualported CM. We compared the performance of the S-RIU with other two single-global bus processor systems by simulation. The simulation results agree with the results of analysis for the access to CM and the processing power. Through these analysises, we showed that the implemented S-RIU structure has better performance than those having the single global-bus architecture. To evaluate the performance in a given network, we calculated the transmission delay through an S-RIU and the token ring network. The result was verified with simulation. Finally, we obtained the end-to-end processing delay by combining the results of processing delay in the S-RIU and the results of the transmission delay in the network. This result shows that the overall performance of the implemented system is mainly dependent on the throughput of the network. As a result, we could find the upper processing bound for normal operation and the maximum traffic intensity which can be supported by the S-RIU in the worst case.