DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, In-Cheol | - |
dc.contributor.advisor | 박인철 | - |
dc.contributor.author | Ahmed, Hasan | - |
dc.contributor.author | 아메드, 하산 | - |
dc.date.accessioned | 2011-12-14T02:08:37Z | - |
dc.date.available | 2011-12-14T02:08:37Z | - |
dc.date.issued | 2009 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=308879&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/38758 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2009.2, [ v, 54 p. ] | - |
dc.description.abstract | A new scheduling scheme to improve the resource utilization of a low-density parity-check decoder has been proposed in this thesis. In the proposed scheme, a completely overlapped processing of check nodes and variable nodes is ensured to achieve full utilization of resources, increasing the throughput of the decoder and reducing the overall decoding latency. Moreover, no restriction is posed on the formation of the parity check matrix and any preprocessing is also not required prior to the decoding. The effectiveness of the proposed scheme is measured through a series of simulations using WiMax802.16e codes with considering an additive white Gaussian noise channel. Furthermore, the proposed scheme is used to implement a decoder for a (576, 7, 6) irregular code. Altera’s CycloneII FPGA is used to verify the working of the developed decoder. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | LDPC | - |
dc.subject | intermingle | - |
dc.subject | decoder | - |
dc.subject | overlapped | - |
dc.subject | 패러티 | - |
dc.subject | 코드의 | - |
dc.subject | 중첩하 | - |
dc.subject | LDPC | - |
dc.subject | intermingle | - |
dc.subject | decoder | - |
dc.subject | overlapped | - |
dc.subject | 패러티 | - |
dc.subject | 코드의 | - |
dc.subject | 중첩하 | - |
dc.title | (An) intermingle approach to low-density parity-check decoder design supporting fully overlapped operations | - |
dc.title.alternative | 연산을 완전히 중첩하여 수행하는 저밀도 패러티 검사 코드의 복호 방식 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 308879/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 020074044 | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.localauthor | 박인철 | - |
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