(A) buffer management scheme for NAND flash-based storage system using multi-channel architecture

Abstract

Recently, NAND flash memory is widely used due to its non-volatility, reliability, low-power consumption, and shock resistance. From a mobile device such as UFC (Ubiquitous Fashionable Computer), mobile phone, PMP (Portable Multimedia Player), and MP3 to a personal or server computer, we use NAND flash memory as a storage device. They need a large capacity and high performance because they store and handle large data. Nowadays, multiple NAND flash memories are constructed in multi-channel, multi-way architecture for improving the performance of NAND flash-based storage system. In this thesis, we propose a buffer management scheme for multi-channel, multi-way architecture of NAND flash-based storage system. This scheme is devised for fully exploiting of multi-channel, multi-way architecture. A buffer management scheme consists of three techniques: request reordering, channel-level LRU, and uniform allocation. First, we use request reordering scheme for sequential write requests. This scheme can increase the channel utilization and reduce merge overhead, thus improving the sequential write performance. For random write requests, we use channel-level LRU which can reduce the write page number of a victim block and uniform allocation scheme which can equally use all channels and ways by allocating requests to each channel and way. Therefore, we can improve the random write performance. We present the simulation results of each scheme and analyze them in this thesis. By using various schemes for the storage system, we can improve the overall performance of NAND flash-based storage system.