Implementation and performance analysis of a communication card for PC networking

Abstract

In this thesis, we investigate the design and implementation of a communication card on PC 386/AT, and analyze its performance for multilink communication. We first consider the hardware and software structure of the communication card. Link and physical level protocols are performed by the X.25 link level controller (LLC). All communication software is processed in the card so that the communication overhead of PC may be reduced. We then analyze the performance of the system in which different bus arbitration strategy is used. Three bus arbitration methods are selected for analysis. They are priority-based arbitration, polling-based arbitration, and random-order arbitration. Mean waiting times of the three methods are nearly equal, and this result has agreed with the "conservation law" in queueing theory. But, the waiting time variance has different value for each method. A polling-based arbitration system with zero switchover time has the smallest variance, and a priority-based system has the largest value due to asymmetrical property. The result has been verified with simulation. Also we consider, by simulation blocking of packets due to the finite capacity of the buffer in the LLC. It has been found that the priority-based arbitration method has the largest blocking probability of the three due to the asynmmetrical nature, and the polling-based system with zero switchover time has the smallest blocking probability. Therefore, we conclude that the polling-based arbitration method with zero switchover time yields the most even service of the three bus arbitration strategies.